1. Field of the Invention
The present invention relates generally to circuits for detecting relative frequency shifts between two signals and, more specifically, to out-of-lock detection circuits for phase-locked loops.
2. Description of the Related Art
A phase-locked loop (PLL) is a circuit that includes a phase detector, a filter and a voltage-controlled oscillator (VCO). The phase detector receives a reference signal and a feedback signal and produces a phase-error signal representing the phase difference between the reference and feedback signals. The filter receives the phase-error signal and provides a filtered signal to the VCO. The VCO produces the feedback signal in response to the filtered phase-error signal. The VCO quickly "locks" or maintains the feedback signal in a fixed phase relationship with the reference signal. If the reference frequency changes, the PLL briefly goes out of lock before regaining lock. A PLL is a versatile circuit that may be used in frequency multipliers, digital data communication circuits, and myriad other circuits.
It is desirable to detect when a PLL goes out of lock, and out-of-lock detection circuits have been developed. A typical out-of-lock detection circuit monitors the reference and feedback signals, and produces a signal indicating an out-of-lock condition when it detects a frequency difference between them. Such out-of-lock detection circuits typically monitor the reference and feedback signals over an interval of a number of cycles of the reference signal before providing an indication that the PLL is out of lock. It would be desirable to provide a faster out-of-lock detector that detects an out-of-lock condition more quickly than prior detectors.
In some circuits a conventional out-of-lock detector may be useless because deviations in the reference frequency or feedback frequency are expected in normal operation. For example, in a spread spectrum communications circuit the reference signal can normally be expected to continuously change frequency over the selected frequency spectrum. The circuit may operate properly, i.e., perform the function intended by the circuit designer, yet trigger a conventional out-of-lock detector. Similarly, in some circuits a certain amount of jitter can be tolerated without detrimentally affecting operation of the circuit. It would be desirable to provide an out-of-lock detector that generates an out-of-lock indication only in response to relatively large frequency deviations and does not generate an out-of-lock indication in response to deviations that can be expected to occur in normal operation. These problems and deficiencies are satisfied by the present invention in the manner described below.